Time to Digital Converter

Objective and Working of Time to Digital Converters

Time to Digital Converters are built because stand-alone calculating devices within physical tests or because system elements like PCI credit cards. They can consist of possibly discrete or even integrated circuits.


Circuit style changes with the objective of the TDC, which may either be an excellent solution with regard to single-shot TDCs along with long lifeless times or even some trade-off in between dead-time as well as resolution with regard to multi-shot TDCs.

The time-to-digital converter measures time between the start events along with a stop occasion. There can also be a digital-to-time converter or delay electrical generator. The hold off generator converts several to a period delay. Once the delay electrical generator gets the start heartbeat at its input, then this outputs an end pulse following the specified hold off. The architectures with regard to TDC as well as delay machines are comparable. Both make use of counters with regard to long, steady, delays. Both must think about the problem associated with clock quantization mistakes.


For instance, the Tektronix 7D11 Electronic Delay runs on the counter structures. An electronic delay might be set through 100 ns to at least one s within 100 ns increments. An analog circuit has an additional good delay associated with 0 in order to 100 ns. A 5 MHz research clock hard disks a phase-locked loop to make a stable 500 MHz time clock. It is actually this quick clock that's gated through the (fine-delayed) begin event as well as determines the primary quantization mistake. The quick clock is actually divided right down to 10 MHz as well as fed in order to main counter-top. The device quantization mistake depends primarily about the 500 MHz time clock (two ns actions), however other mistakes also key in; the device is specified to possess 2. Two ns associated with jitter. The actual recycle period is 575 ns.


Just like a TDC could use interpolation to obtain finer compared to one time clock period quality, a hold off generator could use similar methods. TheHewlett-Packard 5359A High res Time Synthesizer offers delays associated with 0 in order to 160 Microsoft, has a good accuracy of just one ns, and achieves an average jitter associated with 100 ps. The look uses the triggered phase-locked oscillator which runs from 200 MHz. Interpolation is performed with the ramp, a good 8-bit digital-to-analog converter, along with a comparator. The resolution is all about 45 ps.


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